SENIOR RTL DESIGNER
REF: RTLD
Montbonnot / Full time
Senior RTL Designer
REF: RTLD
Kalray is one of the most promising and innovative French Deep Tech companies. A spin-off of CEA French lab, one of Europe’s most prestigious research laboratories, Kalray is a leading provider of hardware and software technologies for high-performance, data centric computing markets, from cloud to edge. The company provides a full range of products to enable smarter, more efficient, and energy-wise data-intensive applications and infrastructures. Its offers include its unique patented DPU processors, acceleration cards, software-defined storage and data management solutions, for growing sectors such as Datacenters, AI, Media & Entertainment, Life Sciences, Scientific Research, Edge Computing, Automotive…
Kalray is a fast-growing company with more than 200 employees. The company is present in France, UK, Germany, US, Japan, and has a number of leading investors such as Alliance Venture (Renault-Nissan-Mitsubishi), NXP Semiconductors, CEA and Bpifrance. Kalray is also listed on Euronext Growth (FR0010722819 – ALKAL).
Kalray is first and foremost a team of passionate, enthusiastic and supportive people, who put excellence and collaboration at the heart of their daily work. Whether you are an expert in your field or a recent graduate, you will find your place and blossom in Kalray’s agile and dynamic environment, where you will be able to fully express your talent and contribute to the company’s success. On the agenda: exciting challenges with friendly and collaborative ambience, within an office set amongst panoramic mountains and vibrant nature… and much more!
To support our growth, we are recruiting a Senior RTL Designer for our Hardware Team. Join the adventure!
POSITION
CANDIDATE
Experience:
- 5 years+ in ASIC or FPGA digital RTL for commercial products.
- Experience in SOC interconnects dimensioning, high speed interface design/integration (PCI, Ethernet or DDR), processors design/integration would be a plus.
Skills:
- RTL design (VHDL or Verilog).
- Familiar with Clock and reset scheme, Synthesis and SDC constraints, formal proof, CDC structures.
- Fluent in technical English.
- Good communication / reporting skills.
- Capable of managing a small team (contractors, partners, junior people).
Profile:
- Curious, autonomous, rigorous.
- Strong teamwork skills.
